1. Field of the Invention
This invention relates to shadow masks and, more particularly, to a shadow mask for use in an ion implantation process.
2. Description of the Prior Art
In the manufacture of semiconductor devices, it is well known to use ion implantation processes to introduce dopants into regions of semiconductor chips comprising the active portions of the devices. Typically, a region to be implanted is defined by an opening in a mask, such as a silicon oxide or silicon nitride mask, grown on the surface of the semiconductor chip and usually removed after the implantation step. Such processing steps are typically performed on semiconductor wafers comprising numerous identical device chips that will be separated later.
It is also well known to use shadow masks in ion implantation processes to eliminate the need for forming a mask on each semiconductor wafer. A shadow mask is a stencil-like structure fabricated with a pattern of openings defining the region to be implanted. Such a shadow mask is positioned next to a semiconductor wafer when the wafer is being implanted and can be used repeatedly for implanting different wafers. An example of a prior art shadow mask for ion implantation is shown in U.S. Pat. No. 3,713,922 issued to Lepselter et al.
The portion of a shadow mask having the pattern-defining openings should be relatively thin, for example, less than 1 mil and preferably less than 10.mu.m, for high resolution patterns to be obtained in the implantation process. The mask should also have adequate mechanical strength to permit repeated handling, and high thermal capacity to prevent the mask from overheating during the implantation process. The latter two requirements indicate a relatively thick mask. These conflicting requirements can be met with a mask having relatively thick ribs in an intersecting grid pattern and relatively thin webs spanning the openings between the ribs, with the pattern openings in the webs. Each web typically comprises the pattern openings for one device chip.
One method of forming a grid-structured mask is by preferential etching, wherein the mask is fabricated from a silicon wafer by repeated ion implantation and preferential electrolytic etching steps for removing part of the wafer to define the ribs and the webs. Such a method is disclosed in the above-mentioned patent. However, this method is not practical for forming ribs that are extremely thick with respect to the webs, because the repeated implantation and etching steps take too much time, and result in ribs having tapered sides. The tapered ribs reduce the web area available for pattern openings, and such masks have lower thermal capacity and lower mechanical strength than is desired.
It is desired to produce a shadow mask having high mechanical strength and high thermal capacity, having relatively thick, non-tapered ribs, and relatively thin patterned webs between the ribs.